Standard-cell methodology is an example of design abstraction, whereby a low-level very-large-scale integration ( VLSI) layout is encapsulated into an abstract logic representation (such as a NAND gate).Ĭell-based methodology – the general class to which standard cells belong – makes it possible for one designer to focus on the high-level (logical function) aspect of digital design, while another designer focuses on the implementation (physical) aspect. In semiconductor design, standard-cell methodology is a method of designing application-specific integrated circuits (ASICs) with mostly digital-logic features.
For the batteries used as a voltage reference (laboratory standard), see Weston cell and Clark cell.
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